Diseño arquitectura vhdl. cargo con responsabilidad.

Jos*** ***** (XX años)
Senior Advance HW/FW development engineer en Indra Sistemas
Universidad Carlos III, Madrid
Rivas Vaciamadrid,
Madrid
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Experiencia
Senior Advance HW/FW development engineer
Indra Sistemas
jun 2014 - Actualmente
I am currently working on the FPGA Firmware for a new development focused on Electronic-Warfare. This project is based on the new RFSoC from Xilinx, and the architecture of the device itself requires a solid DSP background, as well as knowledge of very fast communication interfaces.  
My last accomplished project was the ESA's S3TSR (SPACE SURVEILLANCE AND TRACKING), which is a terrestrial RADAR to detect objects orbiting the earth. I have been responsible of the digital reception module, which is a multi-channel receiver (Gsps) and multi-Gbps communication system. I have been involved on both HW and FW of the module, on which lies the digital beamforming capabilities of the RADAR.
Previously I was involved on the development of the transmission firmware for a RADAR system over a 7-series FPGA device. In this project, I developed the signal processing modules in base band, generating the RADAR signals. I worked with a fast (Gsps) Digital to analog converter. Above 90% of the firmware is direct VHDL coding.
Another design I‘ve made is a control board for a DTO system (Digitally Tuned Oscillator). I have designed the analog/digital board electronics (Altium), as well as the FPGA firmware and PC calibration/control software (CVI from National Instruments). I developed a NAND flash Driver (VHDL), SPI and I2C driver (VHDL), NCO (VHDL), for the devices I put into the control board. I have also developed a PID controller for temperature stabilization (C program running over Microblaze embedded microprocessor).
R&D engineer
Promax Electronica S.A.
ene 2011 - jun 2014
On this job, I had the opportunity of been part of the team which designed and developed the current PROMAX spectrum analyser family, which is currently on the market. On this project, I worked on the RF electronics of the equipment, improving filter and oscillator devices. However, my mean task was the R&D process of the FPGA measure system of the spectrum analyse. Therefore, I got from this project a great background on DSP algorithms (FFT, windowing, multi-rate filtering, decimation, interpolation, Demodulation, frequency windowing, fast filtering, calibration). Design research was accomplished through intensive use of MATLAB simulation tools (Script and Simulink). I developed the whole spectrum generation system, as well the spectrum measures in VHDL, using Xilinx programming tools (ISE) as well as ModelSim software. After that, I developed low and high level software (C/C++) over embedded and ARM processors, to support the measure system. On the other hand, I also designed the electronic protections of a low power amplifier.
Formación
Master Ingeniería Superior telecomunicaciones
Universidad Carlos III, Madrid
2002 - 2009